S1 EQU $0002
RAMStart EQU $0080
RomStart EQU $EC00 ; Valid for JL3, JK3
VectorStart EQU $FFDE
$Include 'jl3regs.inc' ; For the 68HC908JL3, 68HC908JK3, 68HC908JK1
org RamStart
conta1 db 1
conta2 db 1
conta3 db 1
conta4 db 1
temp_word ds 2
temp_byte ds 1
Timeout1 ds 1 ; Allows three timeout routines to be called each of which
Timeout2 ds 1 ; can run for up to ~ 1/2 second.
Timeout3 ds 1
org RomStart
**************************************************************
* Main_Init - This is the point where code starts executing *
* after a RESET. *
**************************************************************
dummy_isr:
rsp
Bset 0,CONFIG1;Desabilita el watchdog
clr conta1
mov #$ff,DDRB ; Setting PortB to an output
mov #$ff,PORTB
mov #$F7,DDRD ; 11110111b
mov #$AA,PORTD
mov #$08,ADSCR ; 00001000b; CH8,D3
mov #$00,ADCLK
main_loop
bsr retardo
mov ADR,PORTB
mov #$08,ADSCR ; 00001000b; CH8,D3
mov #$00,ADCLK
INC PORTD
bra main_loop
retardo:
;mov #$1,conta4 ;5 ;21
r6 mov #$1,conta3 ;5 ;21
r5 mov #$64,conta2 ;64
r4 mov #$64,conta1 ;64
r1 dbnz conta1,r1 ;255*5
r2 dbnz conta2,r4 ;255*5
r3 dbnz conta3,r5
;r7 dbnz conta4,r6
r_sal rts
ADC_rutine
mov #$08,ADSCR ; 00001000b; CH8,D3
mov #$00,ADCLK
mov ADR,PORTB
rti
**************************************************************
* Vectors - Timer Interrupt Service Routine. *
* after a RESET. *
**************************************************************
org VectorStart
dw ADC_rutine ; ADC Conversion Complete Vector
dw dummy_isr ; Keyboard Vector
dw dummy_isr ; (No Vector Assigned $FFE2-$FFE3)
dw dummy_isr ; (No Vector Assigned $FFE4-$FFE5)
dw dummy_isr ; (No Vector Assigned $FFE6-$FFE7)
dw dummy_isr ; (No Vector Assigned $FFE8-$FFE9)
dw dummy_isr ; (No Vector Assigned $FFEA-$FFEB)
dw dummy_isr ; (No Vector Assigned $FFEC-$FFED)
dw dummy_isr ; (No Vector Assigned $FFEE-$FFEF)
dw dummy_isr ; (No Vector Assigned $FFF0-$FFF1)
dw dummy_isr ; TIM1 Overflow Vector
dw dummy_isr ; TIM1 Channel 1 Vector
dw dummy_isr ; TIM1 Channel 0 Vector
dw dummy_isr ; (No Vector Assigned $FFF8-$FFF9)
dw dummy_isr ; ~IRQ1
dw dummy_isr ; SWI Vector
dw dummy_isr ; Reset Vector
* This source is (C)opyright 1999, P&E Microcomputer Systems, Inc.
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